Update code to v1.0.14 (10)

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/README_SAMV71

@@ -0,0 +1,14 @@
+Each example project here has it's own README please follow them in detail.
+
+embOS_wolfcrypt_benchmark_SAMV71_XULT\README_wolfcrypt_benchmark
+embOS_wolfcrypt_lib_SAMV71_XULT\README_wolfcrypt_lib
+embOS_wolfcrypt_test_SAMV71_XULT\README_wolfcrypt_test
+
+
+Thank you for using this guide and we hope this is helpful to you. If you have
+any suggestions / feedback for us please contact us:
+support@wolfssl.com
+info@wolfssl.com
+
+Copyright © 2016 wolfSSL Inc.  All rights reserved.
+

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_SAMV71_XULT_Linker_Script/samv71q21_wolfssl.icf

@@ -0,0 +1,33 @@
+/*
+ * A simple example for evaluation purposes written from scratch by wolfSSL Inc
+ */
+
+/*###ICF### ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__     = 0x00400000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20459999;
+define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x00599999;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__      = 0x400;
+define symbol __ICFEDIT_size_heap__        = 0x13000;
+/**** ###ICF###*/
+
+define memory mem with size = 4G;
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region { readonly };
+place in RAM_region { readwrite, block CSTACK, block HEAP };
+

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_SAMV71_XULT_user_settings/user_settings.h

@@ -0,0 +1,67 @@
+#ifndef _EMBOS_USER_SETTINGS_H_
+#define _EMBOS_USER_SETTINGS_H_
+
+    #undef WOLFSSL_EMBOS
+    #define WOLFSSL_EMBOS
+
+    #undef WOLFCRYPT_ONLY
+    #define WOLFCRYPT_ONLY
+
+    #undef NO_64BIT
+    #define NO_64BIT
+
+    #undef SIZEOF_LONG
+    #define SIZEOF_LONG 4
+
+    #undef SIZEOF_LONG_LONG
+    #define SIZEOF_LONG_LONG 8
+
+    #undef USE_FAST_MATH
+    #define USE_FAST_MATH
+
+    #undef HAVE_CHACHA
+    #define HAVE_CHACHA
+
+    #undef HAVE_POLY1305
+    #define HAVE_POLY1305
+
+    #undef ECC_SHAMIR
+    #define ECC_SHAMIR
+
+    #undef HAVE_ECC
+    #define HAVE_ECC
+
+    #undef ECC_USER_CURVES
+    #define ECC_USER_CURVES
+
+    #undef ALT_ECC_SIZE
+    #define ALT_ECC_SIZE
+
+    #undef FP_MAX_BITS_ECC
+    #define FP_MAX_BITS_ECC (256 * 2)
+
+    #undef TFM_TIMING_RESISTANT
+    #define TFM_TIMING_RESISTANT
+
+    #undef WOLFSSL_SHA512
+    #define WOLFSSL_SHA512
+
+    #undef WOLFSSL_SHA384
+    #define WOLFSSL_SHA384
+
+    #undef HAVE_AESGCM
+    #define HAVE_AESGCM
+
+    #undef NO_INLINE
+    #define NO_INLINE
+
+    #undef BENCH_EMBEDDED
+    #define BENCH_EMBEDDED
+
+    #undef WOLFSSL_SMALL_STACK
+    #define WOLFSSL_SMALL_STACK
+
+    #undef USE_WOLFSSL_MEMORY
+    #define USE_WOLFSSL_MEMORY
+
+#endif /* _EMBOS_USER_SETTINGS_H_ */

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_SAMV71_XULT_user_settings/user_settings_simple_example.h

@@ -0,0 +1,43 @@
+#ifndef _EMBOS_USER_SETTINGS_H_
+#define _EMBOS_USER_SETTINGS_H_
+
+    #undef WOLFCRYPT_ONLY
+    #define WOLFCRYPT_ONLY
+
+    #undef NO_64BIT
+    #define NO_64BIT
+
+    #undef SIZEOF_LONG
+    #define SIZEOF_LONG 4
+
+    #undef SIZEOF_LONG_LONG
+    #define SIZEOF_LONG_LONG 8
+
+    #undef HAVE_CHACHA
+    #define HAVE_CHACHA
+
+    #undef HAVE_POLY1305
+    #define HAVE_POLY1305
+
+    #undef ECC_SHAMIR
+    #define ECC_SHAMIR
+
+    #undef HAVE_ECC
+    #define HAVE_ECC
+
+    #undef WOLFSSL_SHA512
+    #define WOLFSSL_SHA512
+
+    #undef WOLFSSL_SHA384
+    #define WOLFSSL_SHA384
+
+    #undef HAVE_AESGCM
+    #define HAVE_AESGCM
+
+    #undef NO_INLINE
+    #define NO_INLINE
+
+    #undef BENCH_EMBEDDED
+    #define BENCH_EMBEDDED
+
+#endif /* _EMBOS_USER_SETTINGS_H_ */

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_SAMV71_XULT_user_settings/user_settings_verbose_example.h

@@ -0,0 +1,193 @@
+#ifndef _EMBOS_USER_SETTINGS_H_
+#define _EMBOS_USER_SETTINGS_H_
+
+/* ------------------------------------------------------------------------- */
+/* Platform */
+/* ------------------------------------------------------------------------- */
+#undef NO_INLINE
+#define NO_INLINE
+
+#undef  SINGLE_THREADED
+#define SINGLE_THREADED
+
+#undef  WOLFSSL_SMALL_STACK
+#define WOLFSSL_SMALL_STACK
+
+
+/* ------------------------------------------------------------------------- */
+/* Math Configuration */
+/* ------------------------------------------------------------------------- */
+#undef NO_64BIT
+#define NO_64BIT
+
+#ifndef SIZEOF_LONG
+#define SIZEOF_LONG 4
+#endif
+#ifndef SIZEOF_LONG_LONG
+#define SIZEOF_LONG_LONG 8
+#endif
+
+#undef  USE_FAST_MATH
+#define USE_FAST_MATH
+
+#ifdef USE_FAST_MATH
+    #undef  TFM_TIMING_RESISTANT
+//    #define TFM_TIMING_RESISTANT
+
+    /* Optimizations (TFM_ARM, TFM_ASM or none) */
+    #undef  TFM_ARM
+//    #define TFM_ARM
+
+    #undef  TFM_ASM
+    //#define TFM_ASM
+#endif
+
+/* ------------------------------------------------------------------------- */
+/* Crypto */
+/* ------------------------------------------------------------------------- */
+#undef WOLFCRYPT_ONLY
+#define WOLFCRYPT_ONLY
+
+/* ECC */
+#if 1
+    #undef  HAVE_ECC
+    #define HAVE_ECC
+
+    /* Manually define enabled curves */
+    #undef  ECC_USER_CURVES
+    #define ECC_USER_CURVES
+
+    #define HAVE_ECC192
+    #define HAVE_ECC224
+    #undef NO_ECC256
+    #define HAVE_ECC384
+    #define HAVE_ECC521
+
+    /* Fixed point cache (speeds repeated operations against same private key) */
+    #undef  FP_ECC
+    //#define FP_ECC
+    #ifdef FP_ECC
+        /* Bits / Entries */
+        #undef  FP_ENTRIES
+        #define FP_ENTRIES  2
+        #undef  FP_LUT
+        #define FP_LUT      4
+    #endif
+
+    /* Optional ECC calculation method */
+    /* Note: doubles heap usage, but slightly faster */
+    #undef  ECC_SHAMIR
+    #define ECC_SHAMIR
+
+    /* Reduces heap usage, but slower */
+    #undef  ECC_TIMING_RESISTANT
+    #define ECC_TIMING_RESISTANT
+
+    #ifdef USE_FAST_MATH
+        #undef  ALT_ECC_SIZE
+        #define ALT_ECC_SIZE
+
+        /* wolfSSL will compute the FP_MAX_BITS_ECC, but it can be overriden */
+        /* MAX ECC BITS = ROUND8(MAX ECC) * 2 */
+        //#undef  FP_MAX_BITS_ECC
+        //#define FP_MAX_BITS_ECC (528 * 2)
+
+        /* Enable TFM optimizations for ECC */
+        #define TFM_ECC192
+        #define TFM_ECC224
+        #define TFM_ECC256
+        #define TFM_ECC384
+        #define TFM_ECC521
+    #endif
+#endif
+
+/* RSA */
+#undef NO_RSA
+#if 1
+    #ifdef USE_FAST_MATH
+        /* Maximum math bits (Max RSA key bits * 2) */
+        #undef  FP_MAX_BITS
+        #define FP_MAX_BITS     4096
+    #endif
+
+    /* half as much memory but twice as slow */
+    #undef  RSA_LOW_MEM
+    //#define RSA_LOW_MEM
+#else
+    #define NO_RSA
+#endif
+
+/* AES */
+#undef NO_AES
+#if 1
+    #undef  HAVE_AESGCM
+    #define HAVE_AESGCM
+
+    /* GCM Method: GCM_SMALL, GCM_WORD32 or GCM_TABLE */
+    #undef  GCM_SMALL
+    #define GCM_SMALL
+#else
+    #define NO_AES
+#endif
+
+/* ChaCha20 / Poly1305 */
+#undef HAVE_CHACHA
+#undef HAVE_POLY1305
+#if 1
+    #define HAVE_CHACHA
+    #define HAVE_POLY1305
+
+    /* Needed for Poly1305 */
+    #undef  HAVE_ONE_TIME_AUTH
+    #define HAVE_ONE_TIME_AUTH
+#endif
+
+
+/* ------------------------------------------------------------------------- */
+/* Hashing */
+/* ------------------------------------------------------------------------- */
+/* Sha */
+#undef NO_SHA
+#if 1
+#else
+    #define NO_SHA
+#endif
+
+/* Sha256 */
+#undef NO_SHA256
+#if 1
+    /* over twice as small, but 50% slower */
+    //#define USE_SLOW_SHA2
+#else
+    #define NO_SHA256
+#endif
+
+/* Sha512 */
+#undef WOLFSSL_SHA512
+#if 1
+    #define WOLFSSL_SHA512
+
+    /* Sha384 */
+    #undef  WOLFSSL_SHA384
+    #if 1
+        #define WOLFSSL_SHA384
+    #endif
+#endif
+
+/* MD5 */
+#undef  NO_MD5
+#if 1
+    #define NO_MD5
+#endif
+
+/* ------------------------------------------------------------------------- */
+/* Benchmark / Test */
+/* ------------------------------------------------------------------------- */
+/* Use reduced benchmark / test sizes */
+#undef  BENCH_EMBEDDED
+#define BENCH_EMBEDDED
+
+#undef  USE_CERT_BUFFERS_2048
+#define USE_CERT_BUFFERS_2048
+
+#endif /* _EMBOS_USER_SETTINGS_H_ */

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_benchmark_SAMV71_XULT/Application/runBenchmarks.c

@@ -0,0 +1,29 @@
+#include "RTOS.h"
+#include "BSP.h"
+#include <stdio.h>
+#include <wolfcrypt/benchmark/benchmark.h>
+
+static OS_STACKPTR int WLFSTACK[20000];   /* Stack Size for Task */
+static OS_TASK WLFTASK;                   /* Task */
+
+static void wolfTask(void) {
+  printf("Begin Benchmark Tests\n");
+  benchmark_test(NULL);
+  printf("Benchmark Tests Complete\n");
+  while (1) {
+    BSP_ToggleLED(1);
+    OS_Delay(200);
+  }
+}
+
+
+int main(void) {
+  OS_IncDI();                      /* Disable interrupts */
+  OS_InitKern();                   /* Initialize OS */
+  OS_InitHW();                     /* Initialize Hardware */
+  BSP_Init();                      /* Initialize LED ports */
+  /* You need to create at least one task before calling OS_Start() */
+  OS_CREATETASK(&WLFTASK, "Tests task", wolfTask, 100, WLFSTACK);
+  OS_Start();                      /* Start the OS */
+  return 0;
+}

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_benchmark_SAMV71_XULT/README_wolfcrypt_benchmark

@@ -0,0 +1,70 @@
+Steps taken to evaluate wolfSSL with the following:
+
+Required Software for this guide:
+IAR Embedded Workbench IDE - ARM v7.60.1 (or similar version)
+embOS v4.16 (for Cortex-M and IAR compiler)
+wolfssl (latest version)
+
+Required items (Hardware) for this guide:
+Atmel SAM V71 Xplained Ultra (Or equivalent Cortex-M Evaluation Board)
+    Note: Must have J-Trace adapter (SWD or SWD + ETM)
+j-Trace for ARM Cortex-M Processors
+    Note: You can see here: https://www.segger.com/j-trace-for-cortex-m.html
+    Note: You can also purchase other models, we used one from IAR v3.2
+20 pin target ribbon cable
+USB Cable with j-Trace adapter end
+Micro usb cable
+
+#--!! NOTE !!--#
+For this guide "**SAMV71_DIR" will signify the directory:
+C:\<path-to>\wolfssl\IDE\IAR-EWARM\embOS\SAMV71_XULT\
+
+#----------------------------------------------------------------------------#
+# Setup file system to evaluate wolfssl  in embOS project:
+# (If you have not already done so)
+#----------------------------------------------------------------------------#
+
+1. In wolfssl you will notice the directory:
+    wolfssl\IDE\IAR-EWARM\embOS\extract_trial_here
+
+2. go to embOS website and download a trial for your platform
+   https://www.segger.com/downloads/embos ->
+                                      embOS trial for Cortex-M and IAR compiler
+
+3. Extract (unzip) the download to
+    C:\<path-to>\wolfssl\IDE\IAR-EWARM\embOS\extract_trial_here\
+    (Note: you do not need to do anything further in this directory, the
+      wolfSSL evaluation projects will simply link against it)
+	  
+#----------------------------------------------------------------------------#
+# Evaluate wolfcrypt_benchmarks in embOS project:
+#----------------------------------------------------------------------------#
+
+1. In IAR Workbench go to Project -> Add Existing Project
+    a. Browse to **SAMV71_DIR\embOS_wolfcrypt_benchmark_SAMV71_XULT\
+    b. Choose wolfcrypt_benchmark.ewp and click "Open"
+
+2. Go to Project -> Rebuild All
+
+3. Connect your SAMV71 Xplained Ultra to your PC with micro USB in the "Debug"
+   port for power and the J-Link hooked up to SWD pins and your PC
+
+4. Go to Project -> Download and Debug
+
+5. Once the "Debug" environment has loaded go to: View -> Terminal I/O
+   (This is where the printf's will be directed to)
+
+6. Hit "Go" (Debug option with 3 right arrows "→→→")
+
+7. You should observe the benchmark times for the configured algorithms.
+
+#----------------------------------------------------------------------------#
+#----------------------------------------------------------------------------#
+
+Thank you for using this guide and we hope this was helpful to you. If you have
+any suggestions / feedback for us please contact us:
+support@wolfssl.com
+info@wolfssl.com
+
+Copyright © 2016 wolfSSL Inc.  All rights reserved.
+

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_benchmark_SAMV71_XULT/settings/wolfcrypt_benchmark_Debug.jlink

@@ -0,0 +1,39 @@
+[BREAKPOINTS]
+ForceImpTypeAny = 0
+ShowInfoWin = 1
+EnableFlashBP = 2
+BPDuringExecution = 0
+[CFI]
+CFISize = 0x00
+CFIAddr = 0x00
+[CPU]
+MonModeVTableAddr = 0xFFFFFFFF
+MonModeDebug = 0
+MaxNumAPs = 0
+LowPowerHandlingMode = 0
+OverrideMemMap = 0
+AllowSimulation = 1
+ScriptFile=""
+[FLASH]
+CacheExcludeSize = 0x00
+CacheExcludeAddr = 0x00
+MinNumBytesFlashDL = 0
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 1
+Device="ATSAMV71Q21"
+[GENERAL]
+WorkRAMSize = 0x00
+WorkRAMAddr = 0x00
+RAMUsageLimit = 0x00
+[SWO]
+SWOLogFile=""
+[MEM]
+RdOverrideOrMask = 0x00
+RdOverrideAndMask = 0xFFFFFFFF
+RdOverrideAddr = 0xFFFFFFFF
+WrOverrideOrMask = 0x00
+WrOverrideAndMask = 0xFFFFFFFF
+WrOverrideAddr = 0xFFFFFFFF

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_lib_SAMV71_XULT/README_wolfcrypt_lib

@@ -0,0 +1,44 @@
+Steps taken to evaluate wolfSSL with the following:
+
+Required Software for this guide:
+IAR Embedded Workbench IDE - ARM v7.60.1 (or similar version)
+embOS v4.16 (for Cortex-M and IAR compiler)
+wolfssl (latest version)
+
+Required items (Hardware) for this guide:
+Atmel SAM V71 Xplained Ultra (Or equivalent Cortex-M Evaluation Board)
+    Note: Must have J-Trace adapter (SWD or SWD + ETM)
+j-Trace for ARM Cortex-M Processors
+    Note: You can see here: https://www.segger.com/j-trace-for-cortex-m.html
+    Note: You can also purchase other models, we used one from IAR v3.2
+20 pin target ribbon cable
+USB Cable with j-Trace adapter end
+Micro usb cable
+
+#--!! NOTE !!--#
+For this guide "**SAMV71_DIR" will signify the directory:
+C:\<path-to>\wolfssl\IDE\IAR-EWARM\embOS\SAMV71_XULT\
+
+
+#----------------------------------------------------------------------------#
+# Create wolfcrypt_lib.a
+#----------------------------------------------------------------------------#
+
+1. Open IAR Workbench -> Project -> Add Existing Project
+    a. Browse to **SAMV71_DIR\embOS_wolfcrypt_lib
+    c. Choose wolfcrypt_lib.ewp and click "Open"
+
+2. Go to Project -> Rebuild All
+
+3. Verify the library built, you should now have:
+    **SAMV71_DIR\embOS_wolfcrypt_lib\Debug\Bin\wolfcrypt_lib.a
+
+#----------------------------------------------------------------------------#
+#----------------------------------------------------------------------------#
+
+Thank you for using this guide and we hope this was helpful to you. If you have
+any suggestions / feedback for us please contact us:
+support@wolfssl.com
+info@wolfssl.com
+
+Copyright © 2016 wolfSSL Inc.  All rights reserved.

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_test_SAMV71_XULT/Application/runWolfcryptTests.c

@@ -0,0 +1,29 @@
+#include "RTOS.h"
+#include "BSP.h"
+#include <stdio.h>
+#include <wolfcrypt/test/test.h>
+
+static OS_STACKPTR int WLFSTACK[20000];   /* Stack Size for Task */
+static OS_TASK WLFTASK;                   /* Task */
+
+static void wolfTask(void) {
+  printf("Begin wolfcrypt tests\n");
+  wolfcrypt_test(NULL);
+  printf("wolfcrypt tests complete.\n");
+  while (1) {
+    BSP_ToggleLED(1);
+    OS_Delay(200);
+  }
+}
+
+
+int main(void) {
+  OS_IncDI();                      /* Disable interrupts */
+  OS_InitKern();                   /* Initialize OS */
+  OS_InitHW();                     /* Initialize Hardware for OS */
+  BSP_Init();                      /* Initialize LED ports */
+  /* You need to create at least one task before calling OS_Start() */
+  OS_CREATETASK(&WLFTASK, "Tests task", wolfTask, 100, WLFSTACK);
+  OS_Start();                      /* Start the OS */
+  return 0;
+}

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_test_SAMV71_XULT/README_wolfcrypt_test

@@ -0,0 +1,69 @@
+Steps taken to evaluate wolfSSL with the following:
+
+Required Software for this guide:
+IAR Embedded Workbench IDE - ARM v7.60.1 (or similar version)
+embOS v4.16 (for Cortex-M and IAR compiler)
+wolfssl (latest version)
+
+Required items (Hardware) for this guide:
+Atmel SAM V71 Xplained Ultra (Or equivalent Cortex-M Evaluation Board)
+    Note: Must have J-Trace adapter (SWD or SWD + ETM)
+j-Trace for ARM Cortex-M Processors
+    Note: You can see here: https://www.segger.com/j-trace-for-cortex-m.html
+    Note: You can also purchase other models, we used one from IAR v3.2
+20 pin target ribbon cable
+USB Cable with j-Trace adapter end
+Micro usb cable
+
+#--!! NOTE !!--#
+For this guide "**SAMV71_DIR" will signify the directory:
+C:\<path-to>\wolfssl\IDE\IAR-EWARM\embOS\SAMV71_XULT\
+
+#----------------------------------------------------------------------------#
+# Setup file system to evaluate wolfssl  in embOS project:
+# (If you have not already done so)
+#----------------------------------------------------------------------------#
+
+1. In wolfssl you will notice the directory:
+    wolfssl\IDE\IAR-EWARM\embOS\extract_trial_here
+
+2. go to embOS website and download a trial for your platform
+   https://www.segger.com/downloads/embos ->
+                                      embOS trial for Cortex-M and IAR compiler
+
+3. Extract (unzip) the download to
+    C:\<path-to>\wolfssl\IDE\IAR-EWARM\embOS\extract_trial_here\
+    (Note: you do not need to do anything further in this directory, the
+      wolfSSL evaluation projects will simply link against it)
+
+#----------------------------------------------------------------------------#
+# Evaluate wolfcrypt_tests in embOS project:
+#----------------------------------------------------------------------------#
+
+1. In IAR Workbench go to Project -> Add Existing Project
+    a. Browse to **SAMV71_DIR\embOS_wolfcrypt_test_SAMV71_XULT\
+    b. Choose wolfcrypt_test.ewp and click "Open"
+
+2. Go to Project -> Rebuild All
+
+3. Connect your SAMV71 Xplained Ultra to your PC with micro USB in the "Debug"
+   port for power and the J-Link hooked up to SWD pins and your PC
+
+4. Go to Project -> Download and Debug
+
+5. Once the "Debug" environment has loaded go to: View -> Terminal I/O
+   (This is where the printf's will be directed to)
+
+6. Hit "Go" (Debug option with 3 right arrows "→→→")
+
+7. You should observe the tests run and pass.
+
+#----------------------------------------------------------------------------#
+#----------------------------------------------------------------------------#
+
+Thank you for using this guide and we hope this was helpful to you. If you have
+any suggestions / feedback for us please contact us:
+support@wolfssl.com
+info@wolfssl.com
+
+Copyright © 2016 wolfSSL Inc.  All rights reserved.

android/extern/wolfssl/IDE/IAR-EWARM/embOS/SAMV71_XULT/embOS_wolfcrypt_test_SAMV71_XULT/settings/wolfcrypt_test_Debug.jlink

@@ -0,0 +1,39 @@
+[BREAKPOINTS]
+ForceImpTypeAny = 0
+ShowInfoWin = 1
+EnableFlashBP = 2
+BPDuringExecution = 0
+[CFI]
+CFISize = 0x00
+CFIAddr = 0x00
+[CPU]
+MonModeVTableAddr = 0xFFFFFFFF
+MonModeDebug = 0
+MaxNumAPs = 0
+LowPowerHandlingMode = 0
+OverrideMemMap = 0
+AllowSimulation = 1
+ScriptFile=""
+[FLASH]
+CacheExcludeSize = 0x00
+CacheExcludeAddr = 0x00
+MinNumBytesFlashDL = 0
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 1
+Device="ATSAMV71Q21"
+[GENERAL]
+WorkRAMSize = 0x00
+WorkRAMAddr = 0x00
+RAMUsageLimit = 0x00
+[SWO]
+SWOLogFile=""
+[MEM]
+RdOverrideOrMask = 0x00
+RdOverrideAndMask = 0xFFFFFFFF
+RdOverrideAddr = 0xFFFFFFFF
+WrOverrideOrMask = 0x00
+WrOverrideAndMask = 0xFFFFFFFF
+WrOverrideAddr = 0xFFFFFFFF